SLVU2.8-4.TBT【PDF 1/9 页】IC TVS ARRAY 4-LINE 2.8V 8SOIC

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SLVU2.8-4

EPD TVS Diode Array

For ESD and Latch-Up Protection

PROTECTION PRODUCTS

Description

The SLV series of transient voltage suppressors are

designed to protect low voltage, state-of-the-art CMOS

semiconductors from transients caused by electro-

static discharge (ESD), cable discharge events (CDE),

lightning and other induced voltage surges.

The devices are constructed using Semtech’s propri-

etary EPD process technology. The EPD process pro-

vides low standoff voltages with significant reductions

in leakage currents and capacitance over silicon-

avalanche diode processes. The SLVU2.8-4 features

integrated low capacitance compensation diodes that

reduce the typical capacitance to 5pF per line. This,

combined with low leakage current, means signal

integrity is preserved in high-speed applications such

as 10/100 Ethernet.

The SLVU2.8-4 is in an SO-8 package and may be used

to protect two high-speed line pairs. The “flow-thru”

design minimizes trace inductance and reduces voltage

overshoot associated with ESD events. The low

clamping voltage of the SLVU2.8-4 minimizes the

stress on the protected IC.

The SLV series TVS diodes will meet the surge require-

ments of IEC 61000-4-2, Level 4.

PRELIMINARY

Features

400 Watts peak pulse power (t p = 8/20μs)

Transient protection for high speed data lines to

IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)

IEC 61000-4-4 (EFT) 40A (5/50ns)

IEC 61000-4-5 (Lightning) 24A (8/20μs)

Protects two line pairs (four lines)

Comprehensive pin out for easy board layout

Low capacitance

Low leakage current

Low operating and clamping voltages

Solid-state EPD TVS process technology

Mechanical Characteristics

JEDEC SO-8 package

Molding compound flammability rating: UL 94V-0

Marking : Part number, date code, logo

Packaging : Tape and Reel

Applications

10/100 Ethernet

WAN/LAN Equipment

Switching Systems

Desktops, Servers, and Notebooks

Instrumentation

Base Stations

Analog Inputs

Circuit Diagram

Pin 1, 3

Pin 2, 4

Pin 6, 8

Pin 5, 7

Schematic & PIN Configuration

SO-8 (Top View)

Revision 1/18/2008

www.semtech.com

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